• Techo

[IC design] Google interview - design verification part three

Q1:At a test plan level, how would you verify a 4 port switch? It has 4 symmetric, bidirectional ports, all of which send and receive packets having the following fields: source, destination, data length, data, parity check.


Q2: Design a driver to fit this behavior


Ans: (Not support back to back)

task run_phase(uvm_phase phase) begin

forever begin

while(!(vif.req & vif.gnt)) begin

@(posedge clk);

end

tr.wr = vif.we;

if(vif.we == 1’b0) begin

while(vif.rsp != 1’b1) begin

@(posedge clk);

end

tr.data = data1;

end else begin

tr.data = data0;

end

port.write(tr);

@(posedge clk);

end



end


946 次瀏覽0 則留言

最新文章

查看全部

[科技產業] IC設計股價起飛中,我該換工作嗎?

一兩個月前接到高通 Qualcomm 的電話 說是要發offer給我 由於距離面試結束後已經過了四五個月 時機已不同所以一些因素我婉拒了這個 offer 但後來不斷有 recruiter 或是 headhunter 一直寄信給我 例如 Arm china, Nvidia, Google, SiFive 在這個時機點都瘋狂地找人 讓我不禁懷疑真正的IC設計時代難道現在才開始嗎? 我留下這篇文章來記錄

Logo2020.JPG
  • Instagram - White Circle
  • Google+ - White Circle
  • Facebook - White Circle

Contact Us

Techo私人程式家教

官方LINE ID : @tutortecho

zh-Hant.png

© Copyright 2018 by Sherry Wu and Techo Chao.

Proudly created with Wix.com,

but page loading is too slow,so I don't recommend it.